vhdl对dds的原理设计，由衷要得论文价值。不后悔

基于AT89C51的密码锁（掉电可记忆密码）的程序(Based on AT89C51 lock (down to remembering passwords) program)

This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPGA and CC2500 are connected through SPI mode with the FPGA as the master and CC2500 as the slave.

利用fpga实现gmsk的调制并仿真，全部代码(Fpga implements gmsk)

pcf8563，在quartusII下VERILOG编写的数字时钟程序，8位数码管显示(pcf8563, written in quartusII VERILOG digital clock program, eight digital display)

It is the FSM implemented in Xylinx 14.7 on FPGA

可用的24位x24位的booth乘法器的verilog代码(24X24 booth muplily)

FPGA_CPLD-SHC多款FPGA CPLD开发板的原理图，很好的线路设计参考(FPGA_CPLD-SHC Variety of FPGA CPLD development board schematics, a good reference circuit design)

vhdl,双向移位寄存器，实现置数，左移及右移操作-vhdl, bi-directional shift register to achieve set the number of left and right shift operation

Firmware for autotuning Sensor

Computer Arithmetic (press 2000)