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FPGA-root-operation
本文分析比较了实现开方运算的牛顿一莱福森算法、逐次逼近算法、非冗余开方算法种算法,并给出了基于的开方器的实现方法(Root operation FPGA-based implementation.pdf)
- 2012-11-04 01:44:02下载
- 积分:1
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Stumper.cpp
Convert Roman numerals to integers
- 2012-12-05 03:59:59下载
- 积分:1
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EDA1_MusicCalculator
音乐计算器,可实现999以下加减法及与非运算功能,并能够播放两段音乐,可下载到FPGA板子上实现。(Music Calculator)
- 2020-08-16 23:38:25下载
- 积分:1
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addsub32bit
32bit floating point addition
- 2021-04-06 18:19:02下载
- 积分:1
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一个很好的VHDL实现的功能模块程序,希望你可以用的上!
一个很好的VHDL实现的功能模块程序,希望你可以用的上!-a good VHDL functional module procedures in the hope that you can use!
- 2022-06-01 18:48:57下载
- 积分:1
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verilog设计点滴经验,对fpga设计人员很有好处
verilog设计点滴经验,对fpga设计人员很有好处-Experience in verilog design
- 2022-11-04 10:05:03下载
- 积分:1
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周立功sopc教程的视频资料,适合广大自学者学习
周立功sopc教程的视频资料,适合广大自学者学习-ZLG sopc video tutorial is suitable for the general self-learners to learn
- 2022-02-06 20:02:55下载
- 积分:1
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float_mult32x32.v
verilog 语言写的FPGA内部实现硬件浮点乘法器的源码,两个时钟周期完成一次浮点乘法运算(The FPGA language written in Verilog implements the source of the hardware floating point multiplier, and completes the floating point multiplication operation in two clock cycles.)
- 2018-07-19 17:33:42下载
- 积分:1
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interpolation_shaping_filter
内插成型滤波器的FPGA实现,可根据需要配置不同的内插倍数,Quarter II环境编译,可直接使用(Interpolation shaping filter FPGA, can be equipped with different interpolation factor, Quarter II compiler environment, can be used directly)
- 2013-11-12 21:13:46下载
- 积分:1
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VHDL digital system design and engineering practice 4, including the principles,...
VHDL数字系统设计和工程实践5,包含原理,真值表和原理图,以及VHDL源代码.-VHDL digital system design and engineering practice 4, including the principles, truth table and schematic, as well as VHDL source code.
- 2022-08-11 13:48:51下载
- 积分:1