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Spartan6_GTP_PCIe_xfest_2009_v1_0
采用Xilinx公司的Spartan6 FPGA设计PCI Express的详细参考资料(Xilinx' s PCI Express, Spartan6 FPGA design, detailed reference information)
- 2012-08-30 10:01:33下载
- 积分:1
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waveform_-generator
简易信号波形发生器,可以产生四种波形,频率1k-20K步进可调。学习Verilog HDL的好例子。(imple signal waveform generator, can produce four waveform, frequency 1 k-20 k step can be adjusted. Learning Verilog good example of HDL.
)
- 2011-06-12 21:13:27下载
- 积分:1
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log10(x)
Fixed-point base-2 logarithm (DW_log2)
// Computes the base-2 logarithm of a fixed point value in the
// range [1,2).
- 2014-09-11 19:58:10下载
- 积分:1
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sysgen_gs
Xilinx system generator
- 2020-12-25 15:39:04下载
- 积分:1
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crc16-CCITT
crc-16的编码,使用的多项式是G(x)=x^16+x^12+x^5+1(generator polynomial of degree 16:
G(X)=x^16+x^12+x^5+1)
- 2012-12-07 13:55:21下载
- 积分:1
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vhdl交通灯实验报告
vhdl交通灯实验报告-VHDL traffic lights Experimental Report
- 2022-02-13 04:55:13下载
- 积分:1
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芦苇
reed-solomon译码器。共有7个文件,分别为译码器的7个模块。-reed-solomon decoder. A total of seven papers, respectively, the decoder module 7.
- 2022-02-01 03:32:01下载
- 积分:1
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c51
51数字钟带各种扩展年,月,日等并且可预置。用汇编语言写的(51 digital clock with extended assembly language)
- 2012-11-09 08:41:02下载
- 积分:1
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lcd_system
LCD显示工程,其中包含了顶层文件和各个底层文件(LCD display project, which contains the top-level document and all underlying file)
- 2013-07-24 08:58:53下载
- 积分:1
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RANGEN
2011年全国大学生电子设计竞赛E题“简易数字信号传输性能分析仪”fpga的控制代码,verilog编写;包括了M序列及同步时钟的提取等所有程序。(2011 National Undergraduate Electronic Design Contest E title "Simple digital signal transmission performance analyzer" fpga control code, verilog prepared including the M-sequence and synchronous clock extraction and all other programs.)
- 2020-10-27 17:09:59下载
- 积分:1