基于FPGA的交通灯的设计 有Verilog HDL 源码、仿真图与引脚配置图，已下载实现...

v6 1x 3.125G rapidio协议工程代码(xilinx v6 rapidio data transmission protocol Practical project application engineering code)

基于USART的ARM与FPGA通信实验(Based on the ARM and FPGA communication experiment of USART )

用VHDL语言编写的LDPC码硬件实现语言，相对于verilog的，比较简单-Using VHDL language LDPC code hardware implementation language, compared to Verilog, and relatively simple

改程序将实现对两个信号的曼切斯特编码，以用仿真软件验证过了(Reform program will achieve two Manchester encoded signal to a validated using simulation software)

封装PS2接口驱动，用verilog编写！适用于键盘，鼠标等PS2接口的器件。(failed to translate)

适用于FPGA的SOPC方面的元器件添加，如COMPNENT-Applicable to FPGA-SOPC area to add components, such as COMPNENT

24,60,100进制的计数器，还有数字时钟，欢迎下载哦~-24,60,100 229 of the counter, digital clock also welcome to download oh ~

说明：  设计了六相感应电机的控还原 制平台的硬件结构及其各个组成部分,控制平台结构主要由DSP控制系统和主驱动电路系统以及检测电路系统组成。控制系统采用TI公司的TMS320F2812快速DSP控制芯片。 (This paper designs the hardware structure of the six-phase motor control system and introduces every component. The control platform consists of DSP control system, main drive circuit system and detection circuit system .The control system adopts TMS320F2812 DSP chip of TI Company. 更多还原 )

ALTERA PCIE FPGA开发板（EP4C平台）DDR2内存测试代码(ALTERA PCIE FPGA development board (EP4C platform) DDR2 memory test code)

实现的电子钟，资料非常全面，是一次课程设计的大作业，完成的质量很高。(Achieve the electronic clock information is very comprehensive, curriculum design job, completed high quality.)