基于FPGA的交通灯的设计 有Verilog HDL 源码、仿真图与引脚配置图，已下载实现...

1024点快速傅里叶变换，使用verilog hdl硬件描述语言(1024point FFT，using verilog hdl)

基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,基于视频的运动检测(System Generator based image processing engineering, multimedia processing on FPGA source code, based on video motion detection)

用状态机实现一序列检测器，即检测到串行码{1110010}后，检测器输出1，否则输出0； -State machine used to achieve one sequence detector, which detects the serial code (1110010), the detector output 1, otherwise output 0

A design on a DE270 FPGA with the use of CCD: a camera DC2 and a TRDB LTM after reading from the SRAM.

FPGA控制的SRAM接口不分的设计-FPGA-controlled SRAM interface design, regardless of

vhdl八位十进制数字频率计的设计，顶层和数码管扫描模块(vhdl eight decimal digital frequency meter design, top-level and digital tube scanning module)

VHDL同步串口发送部分，基于Xilinx ISE的编程平台(synchronous serial port sending part on VHDL)

正弦信号发生器，用VHDL来完成，抗干扰能力较强，(Sinusoidal signal generator, using VHDL to accomplish, a strong anti-interference ability,)

XCZ7035的硬件平台使用说明 包括USB接口(XCZ7035 hardware platform instructions Including USB interface)

VHDL 源码模块，可以实现最经典原PWM，可以用于电源，电机的控制()