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用vhdl来实现的数字频率合成的技术,几乎很全的,所有的都有...
用vhdl来实现的数字频率合成的技术,几乎很全的,所有的都有 -Use VHDL to realize the digital frequency synthesis technology, almost the whole of, all have
- 2022-02-04 17:07:58下载
- 积分:1
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ac97 codec fpga vertix5
;建立一个录音机,用于录制和播放8位数字音频样本。实现了一个低通FIR滤波器模块,可以用作抗混叠和重构滤波器。
- 2022-02-06 18:53:20下载
- 积分:1
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raylrnb (3)
说明: 本资源有一个matlab程序段,是仿真BPSK分别在高斯噪声和瑞利衰落下的误码率,产生图形对仿真值和理论值进行比较(This resource has a matlab program segment, which is the bit error rate of simulated BPSK under Gaussian noise and Rayleigh fading respectively. The generated graph compares the simulated value with the theoretical value.)
- 2019-10-21 21:16:04下载
- 积分:1
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7941952NCO_sin
NCO 代码设计 使用VHDL语言 (nco)
- 2009-05-23 16:39:37下载
- 积分:1
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FIFO
FIFO的VERILOG代码编写
可综合的Verilog FIFO存储器(The VERILOG code FIFO write comprehensive Verilog FIFO memory)
- 2010-10-11 20:35:47下载
- 积分:1
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等精度测频率
利用stm32F407实现的等精度测频,可以精确测量频率,误差很小(The equal precision frequency measurement realized by stm32F407 can accurately measure frequency with little error.)
- 2020-06-19 13:00:02下载
- 积分:1
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digital_clock
说明: 数字钟通过verilog实现,并且支持Modelsim仿真,通过实验验证(The digital clock is implemented by Verilog and supports Modelsim simulation)
- 2020-06-18 05:00:02下载
- 积分:1
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led
LED灯、跑马灯的显示源程序,包括对代码的说明(Display source code LED lights, marquees, including the code specification)
- 2013-01-18 18:20:57下载
- 积分:1
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sig_detect
使用信号功率计算,检测信号是否到达。从而控制后续模块,以减小系统功耗。(Signal power calculation, the detection signal to reach. To control follow-up modules to reduce system power consumption.)
- 2012-08-08 15:30:13下载
- 积分:1
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这是本人写的可显示128*64LCD全屏汉字的程序,直接下到片子里即可出现象(需自己定制ROM).想显示第二屏的话只需加一个状态即可....
这是本人写的可显示128*64LCD全屏汉字的程序,直接下到片子里即可出现象(需自己定制ROM).想显示第二屏的话只需加一个状态即可.-I write this is the display of 128* Embedded full screen characters procedures, directly to the unit under the blankets will be out phenomenon (it-yourself customized ROM). to the second screen shows only the state can be a plus .
- 2022-04-07 10:48:15下载
- 积分:1