verilog program for iic bus design. the pakege includes iic protocl master progr...

用verilog编写的分辨率提高的源代码 采用双线性插值(Written resolution with the verilog source code to improve the use of bilinear interpolation)

自己编写的一个verilog HDL小程序，实现基本的task调用function的功能，对初学者有用。在xilinx的ISE仿真调试通过(I have written a verilog HDL small procedures, to achieve the basic function of the task to call the function, useful for beginners. In Xilinx s ISE simulation debugging through)

DE2-115开发板LED显示测试源码，对fpga开发者提供参考(DE2-115 development board LED display test source, provide a reference for fpga developer)

整合的OFDM调制解调方法，matlab文件，modelsim仿真(Integration OFDM modulation and demodulation method, matlab file, modelsim simulation)

flv的vhdl教学文件:在线调试 自己慢慢欣赏吧-flv file of VHDL Teaching: Online debug their慢慢欣赏吧

这是一个很好的USB程序。-This is a very good USB procedures.

波特率可供选择的vhdl源程序,已调试无错误-Baud rate options VHDL source code has no error debug

用verilog编写的科斯塔斯环，希望有帮助(Costas loop written in verilog helpful)

《Verilog HDL 程序设计教程》9("Verilog HDL Design Guide" 9)

成功解决FPGA设计时序问题的三大点.word说明文档，很详细(FPGA design timing problems successfully solved the three points)