蓝牙HCI―UART与并口的FPGA控制接口设计

基于DVI协议动态全彩LED大屏幕发送卡设计与实现,成本比较低,效果很好,可以实现高清视频(Dynamic full-color LED large screen based on the DVI protocol send a card design and relatively low cost, good effect, and can achieve high-definition video)

基于fpga的正弦波发生器设计，有一定的参考价值，写的比较详细-The sine wave generator based on FPGA design, have a certain reference value, a more detailed written

verilog program for 8-bit multiplier

Quartus2环境下基于VHDL状态机的交通灯程序(VHDL state machine traffic lights based on Quartus2 environment)

verilog_ad0809 cpld control

调整iq幅度不平衡的模块，可以解决载漏和边带问题。(Iq amplitude imbalance adjustment module can be resolved carrier and sideband leakage problems.)

实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through

VHDL版的C8051核(C8051).evatronix公司的IP核-VHDL version of the C8051 core (C8051). Evatronix company s IP core

LatticeECP3 SERDES/PCS 使用指南(LatticeECP3 SERDES/PCS usage guide)

its a Fifo BASED design i also Interface DAC2904