DDR (double rate) SDRAM controller reference design Verilog code, can be directl...

ANALYSIS OF D-FLIPFLOPS

高速多通道crc实现，可以并行实现5个通道数据的校验，支持10GB以太网标准-High-speed multi-channel crc implementation, can be achieved in parallel 5-channel data validation, support for 10GB Ethernet standard

这个文档回答了很多关于AHB总线在使用上经常遇到的问题(this doc gives a lot of answers for using AHB bus when doing design)

RS（255，223）编码器，已实际运用到产品中(RS (255,223) encoder has actually applied to products)

verilog 比较基础的教程 呵呵 新手学习学习啊 大家有资料工乡-basis of comparison of the tutorial Verilog Ha ha ah novice learn Rural U.S. Data Works

完成cmos摄像头对图像的捕捉，然后进行拼接通过USB进行传输。(complete picture capture)

用VHDL语言实现一Mealy型时序电路，并做时序仿真和功能仿真检验正确与否。(Implement a Mealy-type sequential circuits using VHDL language, and do functional simulation and timing simulation test correct.)

H.265的FPGA实现！！使用Verilog语言开发。(H.265 FPGA implementation! Developed using Verilog language.)

verilog HDL经典的入门书籍，内容很详细，讲了许多实例，适合硬件描述语言初学者。(verilog HDL classic introductory book, the content is very detailed, spoke many instances, suitable hardware description language for beginners.)

DDS的VHDL源代码，是数字QPSK调制解调中的重要组成部分。(DDS of the VHDL source code, the number of QPSK modulation and demodulation is an important part.)