基于FPGA的高性能32位浮点FFTIP核的开发，适合fpga工程技术人员参考...

在PYNQ-Z1上搭建二值神经网络(BNN)(Building two value neural network (BNN) on PYNQ-Z1)

用verilog实现sd卡读写，亲测可用(Implementation of SD card read and write with Verilog)

用Actel公司的Fusion系列FPGA开发的LCD实验程序-Fusion with Actel s FPGA development series LCD Experimental procedures

verilog 写的工程，是个基于流水线的乘法器(verilog write the works, is based on a pipelined multiplier)

基于fpga和xinlinx ise的串行通信vhdl程序，希望对你有所帮助！-xinlinx and ideally serial communications VHDL process, and I hope to help you!

基于nios ii 控制altera de1 开发板上iic总线实现与at24c02通信-Based on nios ii controlled altera de1 Development Board iic bus for communication with the at24c02

有自己制作的下载器原理图，包含了stlinkv2,XDS100V3,USBBLASTER.原理图和封装，一款多功能下载器。(Have their own production downloader schematic diagram, contains stlinkv2, XDS100V3, USBBLASTER. Schematic diagram and encapsulation, a multi-function downloader.)

vhdl语言例程集锦.pdf，全部的例子，看你会不会偷了-VHDL language routines Collection. pdf, all the examples, you will not see stealing

基于DDS的BPSK调制器设计Verilog源码( U57FA u4E8.08 u868)

用VHDL实现频率计，可测量输入脉冲的频率，并进行简单校正(Realize the frequency of use of VHDL in terms of measurable input pulse frequency, and a simple correction)