xilinx公司的FPGA实现数字视频信号处理器。语言是VHDL。

一个数码管的驱动开发程序，程序完备，可以直接使用，在开发板上使用时注意改变引脚(A digital control of the driver development program, the program is complete, can be used directly, when used in the development of attention to change the pin board)

在nios系统开发中的驱动i2c音频电路的代码,包括verilog代码,与相应的驱动代码(In the nios system development in the driver i2c code for the audio circuitry, including the verilog code, and the corresponding driver code)

DDS的频率转换可以以近似认为是即时的，这是因为它的相位序列在时间上是离散的，在频率控制字改变之后，要经过一个时钟周期之后才能按照新的相位增量增加，所以也可以说它的频率转换时间就是频率控制字的传输时间，-DDS frequency conversion can be considered similar to real-time, this is because it is the phase sequence in time is discrete, in the frequency control word change after one clock cycle to go through before a new phase in accordance with the incremental increase, so it can be said of the frequency switching time is the frequency control word transmission time,

实现beep发出1234567的音乐声音-beep 123456

fpga串口收发完整程序，Verilog语言。(FPGA configuration PLL complete program, Verilog language.)

RS（255，223）编码器，已实际运用到产品中(RS (255,223) encoder has actually applied to products)

本RAR包括《Verilog-HDL实践与应用系统设计》一书中的全部例子，这些例子全部通过了验证。第七章以后的设计实例，不仅有Verilog-HDL的例子，也附了包括VB、VC++等源程序,甚至将DLL的生成方法也详尽地作了说明。(The RAR includes " Verilog-HDL Practice and Application of system design," a book full of examples, all passed validation. Chapter VII of the future design examples, not only examples of Verilog-HDL, but also attached, including VB, VC++ source code, etc., and even DLL generation methods explained in detail.)

verilog写的数字频率计的选择模块,用与显示的选择-written in Verilog digital frequency meter option module, used and display options

关于Digilent Atlys Spartan-6 FPGA development board　audio ac97的讲解及具体应用的源码(Digilent Atlys Spartan-6 FPGA development board audio of ac97' s presentation as well as the specific application' s source code)

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