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061110061
在quartus平台下使用verilog语言编程实现简单的单流水线CPU,可以执行16条基本指令(Quartus platform in the verilog language programming using a simple single-line CPU, can perform 16 basic instructions)
- 2010-05-21 20:01:16下载
- 积分:1
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FPGA_trainning2013A
在EDA实验课上面,自己编写的NCO程序,可以产生出比较真实的正弦波、三角波以及锯齿波,用VHDL程序编写,有modelsim仿真textbench程序(On EDA experiment, oneself write the NCO program, can produce more real sine wave, triangular wave and sawtooth wave with VHDL programming, have the modelsim simulation textbench program
)
- 2013-07-16 15:05:28下载
- 积分:1
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高级加密标准AES的FPGA实现,支持128,256密钥长度格式
高级加密标准AES的FPGA实现,支持128,256密钥长度格式-Advanced Encryption Standard AES, FPGA implementation to support 128,256 key length format
- 2022-03-25 02:47:08下载
- 积分:1
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BCH_EncDec_Matlab
bch编解码的完整版,本人已经做过fpga实现,就是按照该程序为原型,绝对可运行(bch decoding the full version, I have done fpga implementation is in accordance with the procedure for the prototype, can certainly run)
- 2011-10-27 21:55:11下载
- 积分:1
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Can be directly used for engineering applications of CRC checksum inside VHDL co...
可以直接用于工程应用的crc校验VHDL编码
里面有详细的规格书-Can be directly used for engineering applications of CRC checksum inside VHDL code has detailed specifications
- 2022-08-03 19:10:27下载
- 积分:1
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VHDL的基本程序,可以用来驱动键盘,功能强大,虽然和基础
VHDL的基本程序,可以用来驱动键盘,功能强大,虽然和基础-VHDL
- 2022-05-24 06:27:35下载
- 积分:1
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chengxu_jieshou
nrf24l01发送代码,verilog实现NRF24L01通信(NRF24L01 send code, Verilog to achieve NRF24L01 communication)
- 2017-08-09 19:04:16下载
- 积分:1
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pulse_change
用vhdl实现脉冲宽度可控的一简单程序 仿真环境MAXPLUS-(use VHDL to achieve controllable pulse width of a simple process simulation environment Segments-)
- 2005-07-24 11:53:57下载
- 积分:1
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FPGA正弦信号发生器
基于verilog hdl编写的FPGA正弦信号发生器,已测试。(FPGA sine signal generator)
- 2020-11-10 10:59:46下载
- 积分:1
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LCD12864(st7920)
整理的网上关于LCD12864(ST7920控制器)的串并口程序,已在stc89c52rd+11.0592MHz的情况下测试通过(Finishing line on LCD12864 (ST7920 controller) serial and parallel programs, in the case of stc89c52rd+11.0592 MHz test)
- 2020-09-13 08:48:00下载
- 积分:1