黄金时段介绍STA

飞思卡尔智能车芯片模块程序 MC9S12XS128 测试通过(freescale smart car for MC9S12XS128)

CAN总线，I2C，USB等的FPGA实现源码(CAN bus, I2C, USB, etc. FPGA implementation source)

说明：  “基于 ROM 的 LCD图片显示实验 ”中利用 FPGA 片上存储资源存储图片，并通过 LCD接口将图片显示到 LCD屏幕上。但是由于 FPGA 片上存储资源有限，只能存储分辨率较小的图片(In the experiment of LCD image display based on ROM, FPGA on-chip storage resources are used to store pictures, and the pictures are displayed on LCD screen through LCD interface. However, due to the limited on-chip memory resources of FPGA, it can only store images with smaller resolution)

使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上用硬件描述语言实现一个RAM存储器。-The use of Altera" s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 development board with hardware description language to achieve a RAM memory.

位同步例程源代码,FPGA应用领域，Verilog-Bit synchronization routines source code, FPGA applications, Verilog

IT8051，增强版的T51，兼容DW8051核的多数端口，IO需要扩展后使用

关于一个串行数据输入 根据时序将数据分两路输出的程序 -on a serial data input timing will be based on output data using two procedures

说明：  FPGA串口实现。 发送和接受数据功能代码(FPGA serial interface. Send and receive data function code)

The VHDL Cookbook First Edition July, 1990 Peter J. Ashenden Dept. Computer Science University of Adelaide South Australia

说明：  我测试过的！Verilog HDL实现RS编码。(I' ve tested it! RS coding Verilog HDL implementation.)