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MP3
MP3解码的ASIC全部过程,包换含c和vhdl代码,样例。(MP3 decoding ASIC whole process, shifting with c and vhdl code, sample.)
- 2021-01-02 22:48:57下载
- 积分:1
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计数器的VHDL语言
这个程序VHDL计数器计数二进制数并显示脉冲易于程序计数器的VHDL,我们需要了解逻辑电路的VHDL语言的程序员
- 2022-12-04 13:20:03下载
- 积分:1
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二进制除法器,采用移位相减的方法实现,位数可调
二进制除法器,采用移位相减的方法实现,位数可调-The source code of a divider
- 2023-08-14 00:00:02下载
- 积分:1
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Farrow
说明: matlab代码,利用Farrow结构设计分数延时滤波器,滤波器阶数和个数可分别进行设置,利用最大最小准则近似。(Matlab code, using Farrow structure design fractional delay filter, filter order and number can be set separately, using the maximum and minimum criterion approximation.)
- 2021-03-28 22:29:11下载
- 积分:1
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VHDL语言程序集。PDF格式,所有的例子,你将看不到偷…
vhdl语言例程集锦.pdf,全部的例子,看你会不会偷了-VHDL language routines Collection. pdf, all the examples, you will not see stealing
- 2022-02-11 21:16:40下载
- 积分:1
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Labview-Data-acquisition-card-
基于labview的数据采集系统,包括示波器和函数信号发生器,可以实现简单数据采集.(Labview-based data acquisition system, including oscilloscopes and function signal generator, can achieve a simple data acquisition.)
- 2014-01-15 21:26:04下载
- 积分:1
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9_ImageMorphologic
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像形态学部分,腐蚀,膨胀,细化算法(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image morphology section, corrosion, swelling, thinning algorithm)
- 2020-10-23 17:17:22下载
- 积分:1
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VHDL2verilog的程序,相信对大家很有帮助
VHDL2verilog的程序,相信对大家很有帮助-VHDL2verilog procedures, I believe very helpful to everyone
- 2022-03-24 03:20:31下载
- 积分:1
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数字密码引爆器的输入描述:1、 在开始输入密码以前的等待状态,首先要按READY键,表示目前准备就绪,可以输入数字密码;2、 当引爆事件发生后,应该回到等待状态...
数字密码引爆器的输入描述:1、 在开始输入密码以前的等待状态,首先要按READY键,表示目前准备就绪,可以输入数字密码;2、 当引爆事件发生后,应该回到等待状态,设置WAIT_T键;3、 如果输入密码不正确,此时要操作READY和WAIT_T是不起作用的,必须由设计人员重新设置到等待状态,设置SETUP键,SETUP为内部按键,操作人员应该不能接触;4、 确定密码输入后,要设计一个点火按键FIRE;-digit passwords detonated"s input Description : one at the start and enter the password before the wait state, according to First READY button, now ready to be imported into digital code; Two, when detonated after the incident, should wait for the state to set up WAIT_T bond; three, if a password is not correct, this time to operate READY WAIT_T and is non-functional, the design must be re-installed to wait for the state, set up SETUP button SETUP internal keys, the operator should not contact; 4 to determine the password, to design a FIRE- ignition keys;
- 2022-02-26 18:42:40下载
- 积分:1
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zhaozhou_verilog
usb3.0 物理层仿真,verilog编程(Start the physical simulation)
- 2014-04-04 11:49:09下载
- 积分:1