32 floating

通过UART从PC主机读取图片数据，并完成图片在VGA显示器上的显示-through UART from the host PC to read image data, and complete picture of the VGA display on the show

采用xilinx的ROMIP核产生类似正弦信号，经过FFt后可以观察结果(Using the xilinx ROMIP nuclear generating similar sinusoidal signal can be observed through the results after FFt)

应用背景关键技术本书采用“做中学”介绍VHDL和FPGA技术的概念和设计人员通过一系列的实验方法。

用verilog语言编写的步进电机加减速控制算法，可选择梯形曲线或S型曲线算法(Verilog language stepper motor acceleration and deceleration control algorithm, you can choose the trapezoidal curve or S-curve algorithm)

实现任意整数倍的信号分频，可调，不存在毛刺，波形完整，可运于信号的分析与检测(Arbitrary integer multiple of the signal frequency, adjustable, there is no glitch, waveform integrity, and can transport the analysis and the detection signal)

用于FPGA的反量化算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。-FPGA used to quantify anti-HDL coding algorithms, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.

Encryption has become a part and parcel of our lives and we have accepted the fact that data is going to encrypted and decrypted at various stages. However, there is not a single encryption algorithm followed everywhere. There are a number of algorithms existing, and I feel there is a need to understand how they work. So this text explains a number of popular encryption algorithms and makes you look at them as mathematical formulas.

E1 deframmer and Frammer.

CPU代码-VHDL语言，实现了CPU的基本功能。-CPU code-VHDL language, the realization of the basic functions of the CPU.

使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上实现对4x4键盘的输入控制，并显示在一个8段式数码管上。(The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 the development board to realize 4x4 keyboard input control, and displayed in an eight-stage digital pipe.)