NIOSII I2C接口模块及驱动程序，并含有测试程序。对想开发NIOS的工程师很有帮助...

使用verilog实现全数字16QAM调制器，载波频率1MHZ，数据比特流的速率为100Kbps,(the modulation of 16QAM based on FPGA)

bch编解码的完整版，本人已经做过fpga实现，就是按照该程序为原型，绝对可运行(bch decoding the full version, I have done fpga implementation is in accordance with the procedure for the prototype, can certainly run)

利用FPGA实现频率测试,基于VHDL实现,具有良好的测试性能可直接使用-Realize the frequency of testing the use of FPGA-based VHDL realize, has a good test performance can be directly used

DES加密算法的VHDL实现,采用流水线技术实现(The VHDL implement of DES encrypt algorithmic)

FPGA Verilog HDL 读写SRAM(SRAM FPGA Verilog HDL to read and write)

four bit counter verlog source code for veriwell including test bench

Xilinx user constraints file for the cpld xc9536 or xc9536xl or xc9572 or xc9572xl

数字自动增益控制 AGC （automatic gain control） Verilog(automatic gain control Verilog)

说明：  FPGA程序,使用Verilog语言生成1个脉冲可调的PPS脉冲信号。(FPGA program generates 1 PPS pulse signal, using Verilog language.)

用VHDL实现串口 可以实现与pc机的通信 收发 中断都可以 效果比较好-VHDL implement serial port, it can communicate with pc, it can accept and send message, and it can be interrupted.