ALU指令

自己完成的项目，成功用vhdl语言实现数字跑表，可存储。

vhdl,七段数码管驱动程序，完成数字显示功能-vhdl, seven-segment digital tube driver, complete the digital display

A design on a DE270 FPGA with the use of CCD: a camera DC2 and a TRDB LTM after reading from the SRAM.

SPI Verilog code with programmable clock

高速多通道crc实现，可以并行实现5个通道数据的校验，支持10GB以太网标准-High-speed multi-channel crc implementation, can be achieved in parallel 5-channel data validation, support for 10GB Ethernet standard

altera de2 sd 卡源程序。调试成功的-altera de2 sd card source. Debugging success

FPGA神经网络设计（影印本），全英文，很有用(FPGA neural network design (photocopies), all in English, very useful)

该程序描述了运用FPGA进行控制的S形曲线和其他传统加减速控制曲线方法的控制曲线比较研究。(This program is compiled in matlab circumstance。Describing the approach of S-curve control method in FPGA in machine controlling.)

Altera DE0-Nano 开发平台SOPC可编程片上系统实现官方Demo。(Altera DE0-Nano development platform the SOPC programmable on-chip system Official Demo.)

ALTERA上DE2平台，利用内部50M Hz时钟，在数码管模拟显示时间(时分秒)。-ALTERA on DE2 platform, using internal 50M Hz clock, in the digital control simulation show time (hours minutes and seconds).