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based on VHDL development mcu with external device interface, mcu solve the high
基于VHDL语言开发的mcu与外部器件的接口程序,解决了高速mcu与低速外部器件的接口问题。-based on VHDL development mcu with external device interface, mcu solve the high-speed and low-speed external device interface.
- 2023-06-24 09:15:02下载
- 积分:1
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通过vga通讯控制显示器显示七彩条文,通过quartus编译的程序,可用...
通过vga通讯控制显示器显示七彩条文,通过quartus编译的程序,可用-Communication and Control through the vga display colorful provisions quartus compiled through the procedures that can be used
- 2022-01-22 17:41:13下载
- 积分:1
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四位乘法器的VHDL源程序
四位乘法器的VHDL源程序-four Multiplier VHDL source
- 2022-03-28 16:11:53下载
- 积分:1
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速率发生器
应用背景通用模块,以产生可重构的源时钟频率的传输速率。该模块可用于UART,自定义串口协议等。提供一个时钟发生器模块产生可选 ;-波特利率和;——时钟源(可选择分因素) ;还产生接收 ;——时钟的16倍,8倍,倍,倍的传输波特率 ;关键技术UART,VHDL,FPGA,CPLD programmanle逻辑器件。设备无关的代码
- 2023-01-24 03:05:04下载
- 积分:1
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core_arm.tar
ARM7系统IP核的VHDL语言源代码,需要的开发环境是QUARTUS II 6.0。(ARM7 System IP Core VHDL language source code, the need for the development environment is QUARTUS II 6.0.)
- 2021-04-20 00:18:51下载
- 积分:1
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add1A
用于实现锁相光子计数技术的累加器,verilog语言(Accumulator achieve specific cases for accumulator lock detection of photon counting technique)
- 2016-04-09 11:13:25下载
- 积分:1
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adder16b
说明: 潘松那本书上用vhdl语言描述的16位并入并处加法器(Pan book vhdl language used to describe the 16-bit adder into his)
- 2009-07-23 17:02:22下载
- 积分:1
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该源码为几个正弦ROM,已经编译并通过,可以直接下载,不需要,内部含有正弦ROM表,还有ROM的宏模块...
该源码为几个正弦ROM,已经编译并通过,可以直接下载,不需要,内部含有正弦ROM表,还有ROM的宏模块-the source for several sine ROM, has been compiled and passed, can be directly downloaded, not internal ROM containing sine table, the Acer ROM module
- 2022-02-15 13:48:53下载
- 积分:1
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LMS
least mean square algo implemented on verilog
- 2017-11-01 05:01:56下载
- 积分:1
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wimax_ofdm-master
wimax ofdm系统评估代码 wimax ofdm system code 很有参考价值(wimax ofdm system code)
- 2018-11-15 16:35:20下载
- 积分:1