实现十字路口简单交通灯的verilog hdl源代码,可以实现

fpga clock 设计，资料较好，供大家参考，非商用目的哦-fpga clock design, the information is better, for your reference, non-commercial purposes Oh

说明：  basys3的数字钟，可以显示00.00-59.59(Digital clock of basys3,It can display 00.00-59.59)

一个8X8的矩阵键盘的VHDL文件,并且有长安键和短按键之分,即一共能做到128个键值,扫描用的时钟用1ms的就行了-A 8x8 matrix keyboard VHDL files and have Changan and short keys of key points, namely, to achieve a total of 128 keys, scanning with the clock used on the list of 1ms

实现mimo-ofdm系统的交织功能，可供参考(Implement the mixed function of mimo- ofdm system, available for reference)

改程序将实现对两个信号的曼切斯特编码，以用仿真软件验证过了(Reform program will achieve two Manchester encoded signal to a validated using simulation software)

印制线路板设计经验点滴-Printed Circuit Board Design Experience

说明：  5604FPGA驱动，能显示数字（5604里面为4个595）(5604 FPGA driver, able to display digital (5604 contains 4 595))

用硬件VHDL语言实现的串口通信的试验代码，可用来代替单片机的工作对串口进行测试。-VHDL language used hardware realize the serial communication of test code that can be used to replace the work of single-chip serial port for testing.

NiosII_Exercises_Ver3,this niosII 3.o for cyclone

Verilog HDL 数字设计与综合，夏宇闻译。本书重点关注如何应用verilog语言进行数字电路和系统的设计和验证，不仅讲解语法，更从基本概念讲起，逐渐过渡到编程语言接口以及逻辑综合等高级主题。(The design and synthesis of Verilog HDL digital, Xia Wen translation. The book focused on how to apply the verilog language for the design and verification of digital circuits and systems, not only explain the grammar, the more I start from the basic concept, and a gradual transition to advanced topics such as programming language interface and logic synthesis.)