CORDIC算法的FFT实现

这些代码为 对于基本的FPGA使用模块beep进行了例化 在工程 系统级建模时只需要直接调用就好了(The code for the basic FPGA using the module beep instantiated only need to be called directly in the engineering system-level modeling like)

本程序是用verilog 编写的模块，用来在lcd1602上显示用tlc549采样的电压值(This program is written in verilog module, used in lcd1602 display with tlc549 sampled voltage value)

对信号实现2FSK调制,2FSK就是用数字信号去调制载波的频率（移频键控），是信息传输中使用得较早的一种调制方式。它的主要优点是：实现起来较容易；抗噪声与抗衰减的性能较好；在中低速数据传输中得到广泛的应用。-the performance of 2FSK based on verilog

Code to controlling a Image sensor - CMOS(Code to controlling a Image sensor- CMOS)

适用于满足I2C协议的flash读/写操作程序，只需要设置要读/写的字节数，就可以直接使用！-Applicable to meet the I2C protocol flash read/write operations, only need to set to read/write number of bytes can be used directly!

Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART controller was implemented using VHDL 93 and is applicable to any FPGA. Simple UART for FPGA requires: 1 start bit, 8 data bits, 1 stop bit! The UART controller was simulated and tested in hardware.

verilog da0832 cpldfpga control-verilog da0832 cpldfpga control

用verilog hdl语言编写的fpga与片外sram 的读写控制(With the verilog hdl language fpga sram chip with read and write control)

detection of the following sequence ‘10110110’in VHDL

说明：  用于FPGA设计的代码（Verilog代码），在FPGA设计中的高速串并转换，时钟提取，对齐处理等功能(for FPGA design ,written by Verilog HDL the functions include SERDES , CDR and so on)