verilog motor control

非常详细的千兆以太网MAC verilog代码，可以供硬件设计时有关网络的开发参考(Very detailed Gigabit Ethernet MAC verilog code, can be used for hardware design of the network to develop a reference)

lap of altera . it s basic about verilog

verilog motor control

通过本文章的学习能够使我们设计一些简单的逻辑电路和系统。很快我们就能过渡到设计相当复杂的数字逻辑系统。-To learn through this article, will enable us to design some simple logic circuits and systems. Soon we will be able to transition to the design of complex digital logic systems.

Its project to move your mouse cursor on a vga monitor. it is very funny -)(Its project to move your mouse cursor on a vga monitor. it is very funny -))

《FPGA数字信号处理与工程应用实践附光盘》配套源代码(FPGA DSP and their applications with verilog HDL)

全部通过，是我的精心设计，完全满足初学者的要求。-all passed, I was carefully designed, fully meet the requirements of beginners.

本程序是用verilog 编写的模块，用来在lcd1602上显示用tlc549采样的电压值(This program is written in verilog module, used in lcd1602 display with tlc549 sampled voltage value)

说明：  SimpleVOut (SVO) is a simple set of FPGA cores for creating video signals in various formats. The cores connect using AXI-streams. Most configurations (resolution, framerate, colordepth, etc.) are set at compile-time using Verilog parameters. See svo_defines.vh for details on those parameters.

利用VHDL实现CPLD（EMP240T100C5）的PWM输出-Using VHDL realize CPLD (EMP240T100C5) of the PWM output