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CodedLOCK
基于FPGA的电子密码锁设计与实现,语言是VHDL语言,有注释(FPGA-based design and implementation of electronic locks, language is VHDL language, annotated)
- 2013-08-27 21:37:06下载
- 积分:1
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lab8000
矩阵键盘扫描和led显示
这样子可以得到要输入的键码,并通过led显示出来(KEYBOARD AND DISPLAY LED)
- 2012-12-11 22:49:44下载
- 积分:1
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eDP
eDP接口TFT-LCD显示驱动原码(verilog+c)(eDP Interface TFT-LCD display driver source code (verilog+c))
- 2020-10-17 09:17:27下载
- 积分:1
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shumaguandongtai
VHDL的动态扫描显示六个数码管,包含分频代码产生25kHz的扫描信号作为时钟。(VHDL dynamic scanning display six digital tube contains 25kHz scanning signal is generated as a clock divider code.)
- 2012-11-26 14:40:42下载
- 积分:1
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FSK调制通信系统的程序,比较实用,包括有限..
通信系统的FSK调制程序,比较实用,包括完整的工程-FSK modulation communication system procedures, more practical, including the complete works
- 2023-01-02 07:10:03下载
- 积分:1
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使用vhdl语言在altera公司的up3板上产生vga信号,里面有详细的解析和说明,是一个很好的教程。...
使用vhdl语言在altera公司的up3板上产生vga信号,里面有详细的解析和说明,是一个很好的教程。-use of the VHDL language ALTERA company"s board up3 have vga signal containing a detailed analysis and explanation is a good guide.
- 2023-06-25 15:05:03下载
- 积分:1
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8-fft
FFT 8 PT RDX 2 USING VERILOG
- 2014-03-31 02:35:31下载
- 积分:1
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procedures major hardware description language (VHDL) to achieve : MCU and FPGA...
程序主要用硬件描述语言(VHDL)实现:
单片机与FPGA接口通信的问题-procedures major hardware description language (VHDL) to achieve : MCU and FPGA interface communication problems
- 2022-02-12 01:14:15下载
- 积分:1
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FPGA
韩福柱老师FPGA实验源码,用vhdl语言在xilinx FPGA上实现,包括ad采集,温度传感器读取,秒表,跑马灯和按键次数统计4个实验(Han Fu teacher FPGA column experiment source code, vhdl languages on xilinx FPGA implementations, including ad acquisition, temperature sensor readings, stopwatch, marquees and keystrokes 4 experimental statistics)
- 2017-01-06 15:54:53下载
- 积分:1
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verilog例子资源,对于初学者很有帮助。
verilog例子资源,对于初学者很有帮助。-verilog examples of resources are very useful for beginners.
- 2023-08-15 15:30:03下载
- 积分:1