数字滤波器

fpga里实现 uart 经典 vhdl语言写的 ise工程文件-fpga implementation in vhdl language classic uart of ise project file

数字密码锁的vhdl实现，包括设置密码，修改密码，报警。

说明：  使用VHDL实现的LED-80分组密钥，相对于其它密钥具有硬件实现面积更小的特点(vhd code of a lightweight block cipher LED-80)

最新的ATA-六总线协议源代码参考，实现DMA,PIO模式，可挂CDROM,IDE硬盘，CF卡．-the latest ATA-6 bus protocol source code reference, achieving DMA, PIO Mode, can be linked to CDROM, IDE hard drive, CF card.

是用于pci开发的核，可以将硬件的信息映射到然间上来 节省出开发人员用于了解硬件的时间 (Pci developed for nuclear, hardware information can be mapped to the inter-ran up to save the developers time to understand the hardware)

VHDL的源码100例，包括加法、减法、存储、触发等，是初学者、开发人员的必备手册-VHDL source code of the 100 cases, including the addition, subtraction, storage, trigger and so on, is for beginners, developers must Manual

三十个vhdl源码，对于刚开始学习vhdl的很有帮助，可以帮助理解数字电路-30 vhdl source for the beginning of the study vhdl helpful, and can help to understand digital circuit

通过编写verilog语言完成数据的在液晶LCD1602显示(By writing verilog language to complete the data displayed on the LCD LCD1602)

ASIC Design using VHDL by Shyam Mani

Decoder using Miller method for UHF reader