基于Verilog代码简单

Efficient CIC filter Implementation using VHDL

matlab怎么把数据输入到modelsim，文件读写的问题(data write and read from matlab to modelsim)

fft快速傅立叶变换源码-the source of fast fft transform

用状态机实现密码锁State machine used to achieve code lock-State machine used to achieve code lock

主要编写了一组二进制数据通过根升余弦滤波器后的波形，但并没有使用ISE内部的FIR滤波器内核，该程序相当于编写了一个根升余弦滤波器。(Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the preparation of a root raised cosine filter.)

基于DDS和SOPC的谐波信号发射器，拥有可调节的频率，阶段和谐波比例的谐波信号发射器由本文所设计。(Based on DDS and SOPC harmonic signal transmitter, with adjustable frequency, phase and harmonic proportion of harmonic signal transmitter designed by this article.)

这是用VHDL实现的8位加法器，对新手有点帮助。-This is achieved using VHDL adder 8, a little help to novices.

电梯的设计・用来控制6层的电梯设计原来・VHDL语言-Elevator designed to control the lift design 6 original VHDL language

CODE_VHDL_INITIALIZING 液晶电视 DISPLAY(KHỞI TẠO HIỂN THỊ LCD)

基本的VHDL程序本rar文件。 请点击左侧文件开始预览 ！预览只提供20%的代码片段，完整代码需下载后查看 加载中 侵权举报