Oregano Systems 8051 ip core

这是altera公司的DE2-35开发板下的一个液晶显示屏源程序代码工程，液晶显示屏是友晶公司的，包括液晶显示屏的驱动以及显示等模块有需要的人，可以下载 (Altera DE2-35 development board of the company, a liquid crystal display source code engineering, LCD display the Terasic, including LCD driver module and display needs, you can download)

ecc椭圆算法RTL,verilog源代码经过验证，用于FPGA或者ASIC(ECC elliptic curve encryption algorithm for Verilog implementation)

说明：  将嵌入式BT656格式数据解码出带行场同步信号的YCbCr422格式数据(Decoding Embedded BT656 Format Data to YCbCr422 Format Data with Field Synchronization Signa)

FSM_test for textbanch in vhdl-FSM_test

旋转LED 实现自适应转速 字幕滚动 对接的程序(Rotating LED Adaptive Speed ​ ​ subtitles scroll docking program)

用verilong hdl语言编写的数据采样程序，A/D采用的是TLC5260-Verilong hdl language used data sampling procedures, A/D using the TLC5260

这个verilong代码实现的功能是radar processing的功能。(This verilong code function is radar processing functions.)

just division the clock into 2

实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through

数字秒表的实现，我还写个具体的过程要求等，(there is function of clock,it very useful)