异步FIFO的设计 包括testbench 已调试成功

说明：  在zedboard上运行的神经网络架构，方便移植。(Run lenet-5 on zedboard)

Efficient CIC filter Implementation using VHDL

ldpc编码器ru算法的verilog语言的完整实现，希望对您有用(ldpc encoder, RU, VERILOG，altera)

UART功能,可以增加在NIOS2內,主要來做外部Flash的擦除及寫入,需搭配上位機傳輸字串來控制(UART function, can increase the NIOS2, the main external Flash to do the erase and write, to be a string with the host computer to control the transmission)

64点的 FFT verilog,它是串行计算的，工作频率不到100M，计算速率很高，里面的层次很清晰。(64-point FFT verilog serial computing, the operating frequency of less than 100M, the calculated rate is high, the level inside is very clear.)

说明：  通过四个半加器的互联，来实现四位加法器的电路结构(Through the interconnection of four and a half adder to achieve the four adder circuit)

crazy bingo 韩彬将要出版的新书《FPGA设计技巧与案例开发详解》中的所有配套例程源码，主要涉及视频开发方向。(All the supporting source code routines crazy bingo Han Bin will be published book FPGA design techniques and case development explain in the video, mainly relates to the development direction of.)

介绍分频器的好资料。不光有奇数分频、偶数分频，还有小数分频。相信把这个资料理解透了后以后分频器的设计就不是问题了。(Introduction divider good information. Not only have an odd frequency, even frequency, there are fractional. I believe understanding this information through the post after the Divider is not a problem.)

说明：  SDRAM硬件控制,fpga的verilog语言，适合学习(SDRAM hardware control, Verilog language of FPGA, suitable for learning)

4x4鍵盤使用語法為VHDL，基於cyclone(4 x 4 keyboard using VHDL)