1路视频光端机的发射端，VHDL源码，使用全FPGA芯片的硬件，内建成帧、时钟、SERDES...

基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,基于视频的运动检测(System Generator based image processing engineering, multimedia processing on FPGA source code, based on video motion detection)

用VHDL语言编写的代码，以供大家学习和交流，方便大家学习！-prepared using VHDL code for all to study and exchange to facilitate learning!

Its project to move your mouse cursor on a vga monitor. it is very funny -)(Its project to move your mouse cursor on a vga monitor. it is very funny -))

verilog实现基于i2s协议接口，在fpga上验证通过。(Verilog implements the interface based on I2S protocol and verifies it on fpga.)

一些vhdl的简单例子。直接解压，不用密码。-instantiate some simple examples. Direct unpack, without a password.

SEG7数码管显示示例程序，适用于ALTERA的CPLD(SEG7 digital display sample program of ALTERA CPLD)

实现同一个时钟输入,可以实现多分频,在一个时钟的驱动下-Realize with a clock input, can realize multi-frequency, in a clock-driven

QAM调制，基于FPGA的实现，包含有乘法器模块、升降余弦滤波器模块、QAM序列生成模块(QAM modulator,the implementation based on FPGA,include MUL、FIRCOS and QAM generate)

矩阵键盘扫描和led显示 这样子可以得到要输入的键码，并通过led显示出来(KEYBOARD AND DISPLAY LED)

半整数分频器的实现（verilog），本文以6.5分频为例！很实用的！-fen pin qi