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SineGen
Basic VHDL code to create a sine wave generator for an FPGA board.
- 2014-01-24 01:04:15下载
- 积分:1
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DE2_115_NIOS_DEVICE_LED
DE2-115开发板LED显示测试源码,对fpga开发者提供参考(DE2-115 development board LED display test source, provide a reference for fpga developer)
- 2011-09-29 15:07:10下载
- 积分:1
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10_ImageEdge
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像边缘提取(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image edge extraction)
- 2020-10-23 20:27:22下载
- 积分:1
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用Verlog HDL编写的数字钟程序,包含时,分,秒,进位,解码,扫描显示等功能。...
用Verlog HDL编写的数字钟程序,包含时,分,秒,进位,解码,扫描显示等功能。-Written by Verlog HDL ,a digital clock program, including hours, minutes, seconds, into the place, decoding, scanning display.
- 2023-02-05 04:55:03下载
- 积分:1
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Ultrasound
软件环境:TI的zstack协议栈
硬件:CC2530无线单片机
功能:利用超声波模块实现测距(该模块型号:HC-SR04 在淘宝上非常常见) 可测2厘米到3米距离(Software environment: TI' s zstack protocol stack hardware: CC2530 wireless microcontroller features: use of ultrasonic ranging module (the module Model: HC-SR04 on Taobao very common) can be measured 2 cm to 3 meters)
- 2020-12-28 23:39:02下载
- 积分:1
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liushui
本程序实现流水线功能,您可根据自己需要更改参数,试用芯片xilinx,用verilog语言编写(This program implements the pipeline, you may be required to change the parameters according to their own try xilinx chip with verilog language)
- 2016-03-07 09:26:28下载
- 积分:1
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lcd1602
艾米电子的液晶1602的Verilog语言程序
(Amy e-LCD 1602 of the Verilog language program)
- 2010-10-26 11:20:49下载
- 积分:1
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8b10b_xilinx
xilinx 的8B10B编解码源码, 里面有仿真模型,用以测试验证(xilinx 8B10B encode/decode source)
- 2018-07-20 16:02:29下载
- 积分:1
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relay_test
Simple relay trigger
- 2015-01-28 12:16:35下载
- 积分:1
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1
matlab code for JTAG cable checking
- 2014-02-04 19:27:39下载
- 积分:1