This code for countor . it is design in verilog HDL.

用于FPGA的huffman算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。(The huffman algorithm for FPGA HDL coding, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.)

一些非常有用的程序，均经过调试，让大家一块共享。(Some very useful procedure, have been testing, so that everyone shared one.)

12232型号LCD液晶屏显示程序，简单易懂(12232 Model LCD screen display program, easy to understand)

vhdl项目设置： flv的 -VHDL Project Settings: flv

ALTERA嵌入式设计大赛获奖作品文章，非常适合DE2开发参考-ALTERA Embedded Design Competition Prize-winning article, very suitable for the development of reference DE2

这是一个VHDL项目，用于在VIRTEX-4 xc4vsx35 FPGA板中执行接收信号的14位ADC。

信号完整性，设计FPGA的基础-signal integrity, design based FPGA

costas的verilog程序，包含乘法器，DDS，鉴相器，环路滤波器等模块(costas the verilog program, including multipliers, DDS, phase detector, loop filter modules)

fpga模拟两路视频，简单拼接后，经过GPIF II接口传出给cy2014，测试usb的吞吐量(fpga generate two lane video, and transmit them through GPIF II interface. test cy2014)