基于Xilinx FPGA实现PS2键盘鼠标接口。版本1.0

its the vhdl stuff for ddr sdram controller nice one easily understandable

一种基于格雷码的异步FIFO设计与实现,8*8位的fifo VHDL 源码-Gray-code based on the Asynchronous FIFO Design and Implementation

CPLD的VerilogHDL总线代码,在EPM7128SLC84-10+Quartus4平台上运行通过.-CPLD bus Verilog HDL code, the PLD-10 Quartus4 platform to run through.

verilog编写实用多功能电子表-Verilog prepared practical multi-function electronic Table

说明：  十进制到十六进制转换的程序。程序要求从键盘取得一个十进制数，然后把该数以十六进制的形式在屏幕上显示出来。(Decimal to hex conversion program. Procedural requirements to obtain a decimal number from the keyboard, and then the hexadecimal number to be displayed on the screen.)

描述Bayer图像无损压缩的一种先进算法及其如何在FPGA上实现(Description Bayer Image is an advanced lossless compression algorithms in the FPGA to achieve and how)

这篇文章主要是概要的阐述了如何使用-quartusⅡ+Modelsim+synplify pro，来设计FPGA系统。-This is a summary of the main article on how to use the-quartus Ⅱ+ Modelsim+ synplify pro, to design FPGA systems.

UART RS232 IPCORE for sopc builder -RS232 UART IPCORE for sopc builder

说明：  等精度测频法，有需要的可以下载看看哟，word中包含的代码(Equal Precision Frequency Measurement Method)

4 级流水方式的8 位全加器。。。。。。(Way flow of 4 full adder 8. . . . . .)