SDI HDMI 视频转换器和发射机

密码锁verilog源代码，包括四个七段数码管显示模块，设置密码以及输入密码校验模块(Password lock Verilog source code, including four of seven digital tube display module, set the password and password verification module)

关于硬件描述语言Verilog的135个经典实例，从易到难，对Verilog的编程有很大的帮助。(About the Verilog hardware description language 135 classic example, from easy to difficult, for Verilog programming of great help.)

用Verilog HDL编写的PID程序代码，成功调试，运行良好。(The source code of PID in Verilog HDL.Simulation was successful.)

基于VHDL语言开发的I486总线接口程序。实现了一个三态的总线，可保证数据的正常传输。-based on VHDL development of the I486 bus interface procedures. Implementation of a three-state bus can ensure that the normal data transmission.

计数器的程序，eda编程用的，vhdl语言编程，大家下载看看吧(Program counter, eda programming used, vhdl programming )

印制线路板设计经验点滴-Printed Circuit Board Design Experience

- RS码是Reed-Solomon 码（理德－所罗门码）的简称，它是一类非二进制BCH码，在RS码中，输入信号分成k·m比特一组，每组包括k个符号，每个符号由m个比特组成。(- RS code is a Reed-Solomon code (Reed- Solomon codes) for short, is a non-binary BCH code, the RS code, the input signal is divided into a set of k · m bits, each including k symbols, each symbol consists of m bits.)

dsp和fpag通信的测试程序，包含整个工程和signaltap测试信号。(the the dsp and fpag communications test procedures, including the entire the engineering and signaltap test signal.)

可配置CRC参考设计 xilinx提供的VHDL-configurable CRC reference design for Xilinx VHDL

LabVIEW FPGA SPI implementation