Can realize the time digital clock display, and on the hours, minutes, seconds t...

基于NIOS II的SD CARD MUSIC PLAYER源码，包括硬件SOPC-NIOS II based on the SD CARD MUSIC PLAYER source, including hardware SOPC

Verilog语言编写的电话计费系统，这只是源代码，需要在quartusII等软件下运用-Verilog language telephone billing system, this is only the source code, the need to use software such as quartusII

利用VHDL编写的电子琴发生器，以简单的演奏电路论文(Electronic organ prepared using VHDL generator to perform a simple circuit Papers)

这是一个verilog代码实现的常用乘法器。设计的是通用N比特乘M比特的二进制乘法器(This is a common multiplier verilog code. Design of a generic N bits by M bits of the binary multiplier)

一个AD9764的基于FPGA的驱动，希望对有需要的朋友有所帮助(An AD9764 FPGA-based drive, we want to help a friend in need)

ofdm的verilog程序 利用ＦＰＧＡ实现-OFDM FPGA using the Verilog procedures realize

this is bpsk code in matlab

用vhdl实现24小时计数器，方法简单实用。 仿真环境MAXPLUS--use VHDL to achieve 24-hour counter, simple and practical method. Simulation environment Segments-

说明：  FPGA实现乒乓球游戏 代码及仿真 VGA实现(FPGA realizes table tennis game code and simulation VGA implementation)

fft 1024点verilog代码,适用于基-4的FFT算法描述，使用quartus，modelsim，(fftpoint 1024 verilog code)