高级verilog编程实现讲义，全英文讲义

FPGA的仿真实例，Verilog代码编写，过程详尽，代码易懂。第三个文档-FPGA simulation examples, Verilog coding, the process in detail, code easy to understand. The third document

RS 编码和解码Verilog Code, 实现了RS（544,514)的编码和译码；(-RS Coding and Decoding Verilog code，　implement RS（544,514))

说明：  altera ram ip教程。对RAM进行读写操作，写32个数据到RAM中，再将写入的32个数据从RAM中读出。(altera ram ip.write data to ram and read the data from the ram.)

这段代码是用来实现二维高斯滤波器的。

用VHDL写的数字锁相环程序 pll.vhd为源文件 pllTB.vhd为testbench-pll.vhd : PLL written in VHDL hardware language. pllTB.vhd is a test program for pll.vhd.

simple code based on verilog shifter , cla ,clg , ALU ,PC, decoder , tb_top

详细讲解Slave FIFO模式下的初始化设置和相对应寄存器说明(Explain in detail the initial setup Slave FIFO mode and the corresponding register description)

VHDL编写的4个led灯循环明暗变化，通过改变波形占空比实现，课堂作业自编程序-VHDL prepared by the four led lights cycle shading changes, by changing the waveform duty cycle to achieve, self-compiled class operating procedures

用VHDL编写的EPP通信协议，可以同时收发字节-EPP written in VHDL, communication protocol, you can also send and receive bytes

FPGA做机器人舵机控制系统，verilog(FPGA to do the robot servo control system, verilog)