十六进制7Segment时钟

：采用FPGA来实现一个基于OFDM技术的通信系统中的基带数据处理部分，即调制解调器。其中发射部分的调制器包括：信道编码（Reed-Solomon编码），交织，星座映射，FFT和插入循环前缀等模块。我另外制作了相应的解调器，可以实现上述功能的逆变换。(: Using FPGA to implement a technology-based OFDM communication systems in base-band data processing part of the modem. One part of the modulator launch include: channel coding (Reed-Solomon coding), interleaving, constellation mapping, FFT and cyclic prefix insertion modules. I also produced a corresponding demodulator can achieve the above-mentioned inverse transform function.)

基于fpga的矩阵求逆运算，适用xilinx v6板卡(Inverse operation based on fpga matrix)

vhdl 的testbench编写教程，英文ppt以及源码工程(Write tutorials, as well as English ppt Source of engineering vhdl testbench)

fpga下的七段数码管显示 大 学 实 验 报 告-fpga under the seven-segment digital tube experiment reports that the University

次源码实现一个扩频接收机系统，用VHDL语言编写，并且有完整得测试程序-Second source to achieve a spread spectrum receiver system, using VHDL language, and have a complete test procedure was

ADI ad9361 vivado 下源代码(ADI ad9361 vivado source code)

Material to learn how to use system verilog and how to write testbenches for verification.

出租车自动计费系统，功能完善，方便快捷，十分好用-taxi

this is an peak detection alguritm,in this matlab code u can clean base line noise to have clear ECG signal

用于检测信号上升沿，输出与时钟相关的正脉冲(Detect the rising edge of the signal)