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verilog based Real Time clock with manual input implement on fpga
它是一个基于verilog的数字时钟,显示时-分-秒,它可以手动输入,并为时、分和秒分配3个开关第二,它数字时钟频率是实时设置的。我自己用逻辑开发的。。。
- 2022-01-26 02:23:56下载
- 积分:1
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UBlaster
USB Blaster full production data
- 2011-06-17 16:03:28下载
- 积分:1
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QC_LDPC_FPGA
LDPC QC-LDPC 基于FPGA的QC-LDPC实现 论文(LDPC QC-LDPC FPGA-based QC-LDPC detailed implementation steps
Thesis)
- 2021-04-08 09:29:00下载
- 积分:1
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*** ***OC_I2C_Master使用说明*** *****
使用步骤:1.将OC_I2C_Master文件夹拷贝到安装盘alterakits...
*** ***OC_I2C_Master使用说明*** *****
使用步骤:1.将OC_I2C_Master文件夹拷贝到安装盘alterakits
ios2components目录下。
之后重新打开SOPC Builder,在可用元件列表的DeviceSOPC组中将出现OC_I2C_Master
元件,即可像其它Altera外设元件一样添加和使用。
2.hdl文件夹中包含有描述i2c逻辑的硬件描述文件,不能删除。
3.HAL文件夹包含硬件抽象层所需的文件(即驱动),不能删除。
4.inc文件夹包含有定义底层硬件的C语言头文件,不能删除.
5.I2C_doc文件夹下有关于该元件的开发文档。-********* OC_I2C_Master use*********** use these steps: 1. OC_I2C_Master folder will be copied to the installation disk alterakits ios2components directory. Re-open after the SOPC Builder, a list of available devices will appear DeviceSOPC Group OC_I2C_Master components, can be similar to other peripheral devices like Altera add and use. 2.hdl folder contains logical description i2c hardware description files, can not be deleted. 3.HAL folder contains the necessary hardware abstraction layer file (ie drivers), can not be deleted. 4.inc folder contains the definition of the underlying hardware C language header files, should not delete. 5.I2C_doc folder on the developmen
- 2022-04-07 04:49:42下载
- 积分:1
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20190718 - Copy
this files describes how to build i2c block modules in verilog hdl and programming them on an fpga device
- 2020-06-21 21:20:02下载
- 积分:1
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vhdl training
Five day stmicroelectornics vhdl training presentation
- 2018-08-14 21:51:58下载
- 积分:1
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fir4btp
4tap FIR filter in verilog code
- 2014-01-13 22:30:58下载
- 积分:1
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BIT
说明: FPGA应用状态机版,适合初学者学习状态机三段式,ASMD图的理解和翻译,以及Verilog语言的应用 最后对仿真的一些理解 其中包含HDL设计及testbench描述
根据要求设计了一个能求出一个32bit字中两个相邻0之间最大间隙的电路。(FPGA application state machine version, suitable for beginners to learn state machine three-stage, ASMD chart understanding and translation, and Verilog language application. Finally, some understanding of simulation, including HDL design and testbench description
According to the requirements, a circuit is designed to find the maximum gap between two adjacent zeros in a 32 bit word.)
- 2020-04-28 15:57:34下载
- 积分:1
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在SOPC下制作自定义部件(PWM发生器)的源程序,包括硬件描述HDL文件和驱动程序文件...
在SOPC下制作自定义部件(PWM发生器)的源程序,包括硬件描述HDL文件和驱动程序文件-Produced in the SOPC custom component (PWM generator) of the source, including hardware description HDL files and driver files
- 2022-03-19 04:54:11下载
- 积分:1
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33
说明: 高速宽带数字调制技术的研究,该论文也是非常经典的,希望对大家有帮助(High-speed broadband digital modulation technology, the paper is also very classic, I hope all of you help)
- 2009-07-03 11:47:02下载
- 积分:1