svpwm

点阵汉字显示的VHDL原程序.综合实验课程的程序,完全可以用的 希望大家支持啊-Dot-matrix characters shown in the original VHDL program. Comprehensive experimental program procedures, can be used to hope you will support the ah

basic verilog for students

--------------------------------------------------------------------------------

this files describes how to build i2c block modules in verilog hdl and programming them on an fpga device

说明：  SimpleVOut (SVO) is a simple set of FPGA cores for creating video signals in various formats. The cores connect using AXI-streams. Most configurations (resolution, framerate, colordepth, etc.) are set at compile-time using Verilog parameters. See svo_defines.vh for details on those parameters.

mdct, it contains DOC,MATLAB,source,synthesis.

AD9268的配置Verilog实现，程序用于实现4通道的AD9268的配置(The 4 channel AD9268 configuration)

编写 VHDL 代码为 4 x 1 多路复用器，使用下面的方法 (1) if else 语句 (2) case 语句 (3) 与声明

7段数码显示译码器-seven of the digital display decoder

isa总线接口，可以实现与isa总线　的IO和MEMERY接口(isa bus interface can be achieved with the isa bus IO interfaces and MEMERY)