svpwm

本代码来自老师指导，自己编写，可以修改交通灯的时间

8251的完整的功能的实现,可以进行编译,综合.-8251 complete function of the realization can be compiled and integrated.

ip核的FFTverilog源代码，说明不是很具体-ip nuclear FFTverilog source code, that is not very specific

说明：  从github下载的，能够参考设计AXI4的协议接口(AXI4 Verilog template)

拿verilog编写的som(自适应神经网络算法)，用于障碍物检测，基于FPGA可综合实验，已经在altera的cylcone上实现(Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone)

ldpc译码算法介绍及fpga verilog系统方案设计，包括log_bp算法、min_sum算法、scaling_min_sum算法等(introducing the ldpc code decoding algorithm and the related system design，including the log_bp,the min_sum and the scaling_min_sum)

浮点数运算的FPGA实现，包括仿真文件。(FPGA realization of floating-point operations, including the simulation file)

VHDL数字系统设计和工程实践6，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, six, including the principles, truth table and schematic, as well as VHDL source code.

32位/33M 从模式(target)PCI接口参考设计，Lattice提供。由于PCI时序较复杂，此设计仅能供参考-32/route from the model (target) PCI reference design, Lattice provided. Because PCI timing more complicated, and the design for reference only

AES TSAPI Retrieve Event in Non-blocking Mode