使用VHDL语言编程，烧录在芯片运行的倒数5秒响4声短铃最后一声长音的数字钟...

适用于FPGA的SOPC方面的程序开发方面，可以用于添加COMPENENT-Applicable to FPGA-SOPC procedures development, can be used to add COMPENENT

说明：  使用DE2实现DDS，步骤简单，配置管脚可自查看(Using DE2 to realize DDS, the steps are simple and the pins can be self-checked.)

verilog编写的数字信号发生器NCO用CORDIC方法实现产生sin cos信号，流水线结构，简单实用。(verilog prepared by the digital signal generator NCO using CORDIC method implementation generate sin cos signal, pipelined architecture, simple and practical。)

基于FPGA的任意波形信号发生器,可实现频率、幅度、相位的调节，输出方波、正弦波、锯齿波(Arbitrary waveform generator based on FPGA)

mc8051内核,VHDL程序,内有说明,超详细.-mc8051 kernel, VHDL program, which has made it clear, super-detailed.

encoding and decoding of audio signal

VHDL编写的4个led灯循环明暗变化，通过改变波形占空比实现，课堂作业自编程序-VHDL prepared by the four led lights cycle shading changes, by changing the waveform duty cycle to achieve, self-compiled class operating procedures

MAX2 EPLD 的测试程序, VHDL语言编写.-MAX2 EPLD testing code, VHDL language.

说明：  Xilinx CORDIC 算法 MATLAB Verilog仿真(arctan.m Kn.m sin_cos.m MATLAB Verilog)

基于对ROM的编写，在quartusII上实现九九乘法器的实现，在试验箱的四个数码管上分别显示乘数，被乘数，积