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在altera DE2 的开发板上采集图像,到lcd显示的原程序 。
在altera DE2 的开发板上采集图像,到lcd显示的原程序 。-In altera DE2 development board collecting images, lcd display to the original procedure.
- 2022-06-20 13:14:46下载
- 积分:1
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FPGA使用串口实现字节拼接传输更大的数据
FPGA使用串口实现字节拼接传输更大的数据,通过修改代码可以实现任意字节的拼接,并通过自己设定通信协议可以实现与STM32的通信,达到简单而又高效率的通讯效果
- 2023-03-07 05:50:03下载
- 积分:1
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Using VHDL realize CPLD (EMP240T100C5) of the PWM output
利用VHDL实现CPLD(EMP240T100C5)的PWM输出-Using VHDL realize CPLD (EMP240T100C5) of the PWM output
- 2022-05-27 08:17:35下载
- 积分:1
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基于fpga的多功能数字时钟的实现,已经编译过了,绝对可行
基于fpga的多功能数字时钟的实现,已经编译过了,绝对可行-fpga-baseed clock
- 2022-02-04 17:16:32下载
- 积分:1
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VHDL prepared by the FIR filter source for Embedded designers have a good role i...
VHDL语言编写的FIR滤波器源码
对于嵌入式设计者有很好的指导作用
-VHDL prepared by the FIR filter source for Embedded designers have a good role in guiding
- 2022-06-17 20:08:46下载
- 积分:1
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gobang
一个用verilog实现的五子棋程序,用在fpga上,连接显示器,可选择与电脑对战或是双人对战,按wsad控制方向,回车控制落子,程序会自动判断输赢并显示结果(A 331 procedures implemented by verilog, used in fpga, connect the monitor, you can choose to play against the computer or a double play, press wsad control the direction, carriage control Lazi, the program will automatically determine the winners and losers and display the results)
- 2015-03-30 13:13:35下载
- 积分:1
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verilog-2-1-4
卷积码(2,1,4)编解码的FPGA实现(Convolution code (2,1,4) decoding the FPGA implementation)
- 2020-12-27 21:09:02下载
- 积分:1
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Vhdl实现的鼠标协议历程,代码可读性高,适合作为案例参考。
Vhdl实现的鼠标协议历程,代码可读性高,适合作为案例参考。-VHDL realize the course of the mouse protocol, code readable, suitable as a reference case.
- 2023-05-02 16:50:03下载
- 积分:1
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Verilog based on the eight
基于Verilog的八层电梯设计,能够实现自动化的电梯控制。-Verilog based on the eight-lift designed to automate the elevator control.
- 2022-08-13 02:17:13下载
- 积分:1
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Project7_5
基于fpga状态机的交通灯设计,亮灯时间自己修改,程序简单易懂。(Traffic light design based on FPGA state machine, light time self-modifying, the program is simple and easy to understand.)
- 2020-06-18 04:00:01下载
- 积分:1