基于fpga的多功能数字时钟的实现，已经编译过了，绝对可行

使用verilog语言进行编码 完成mdio接口访问phy8201芯片的功能(Use verilog language to encode the mdio interface to access the function of phy8201 chip)

伪随机序列FPGA 通过仿真 M3000(Pseudo-random sequence M3000 FPGA simulation)

一些例子程序需要的话可以下来看看新手推荐-Some examples of procedures can be down if necessary to see novice Recommended

这是一个计算机组成原理综合性实验：设计8位cpu。该cpu是8bit的代码，包含有4个寄存器，一个存储器，还有alu以及控制器。一共可以实现16条指令。(This is a computer composition principle of comprehensive experiment: Design 8 cpu. The cpu is 8bit code contains four registers, a memory, as well as alu and controllers. A total of 16 instructions can be achieved.)

VHDL写的串口，很好用，程序非常简单，可以调试用-Written in VHDL serial, very good, and the procedure is very simple, you can debug with

VHDL与源代码包-and VHDL source code

自编的64B/66B解码程序，做毕业设计的时候写的。(The decoding process 64B/66B , written when i am in the school。)

Synthesizable model of Atmel ATmega103 microcontroller. (VHDL IP)-Synthesizable model of Atmel Application of ATmega103 mi crocontroller. (VHDL IP)

在ISE12.4与TMS320F2812的XINTF接口，实现数据收发(In ISE12.4 TMS320F2812 the XINTF, data transceiver)

FPGA核心代码，可在工程中直接使用。-FPGA core code, can be directly used in engineering.