VHDL_count 从 0 到 9 4 7 段 LED 显示 4 脉冲使 （đếm 慈 0 đến 9 hiển 施耐 4 带领 7 đoạn với 4 xung 启用）

用FPGA实现CRC算法，只用一个脉冲就能实现，比传统的移位算法大大节约时间-Using FPGA to achieve CRC algorithm, only one pulse will be able to realize, than the traditional algorithm greatly saving time shift

verilog i2c master rtl+testbench 转自特权同学(verilog i2c master rtl+testbench)

说明：  fpga设计常用资料大全，包含常用的FPGA程序资料，对FPGA学习者有很大的帮助。(Encyclopedia of common information fpga design, FPGA that contains commonly used procedures for information on the FPGA is very useful to learners.)

Link the VGA adapter located in the altera DE2board to a monitor

一种接口控制板的逻辑电路设计CPLD程序。-an interface to the control board CPLD logic circuit design process.

卷积码(2,1,7)编码器，一个输入，两个输出(Convolution code (2,1,7) encoder, an input and two outputs)

对赛灵思7系列的三种型号的FPGA进行了综述(xilinx 7 productin overview)

ep2c5 实现 段寄存器,实验一 verilog语言，quartus 2 仿真-Register ep2c5 achieve above experiment a verilog language, quartus 2 Simulation

GPS接收机相关器中关于积分清零模块、历元计数模块、时钟模块、以及整个相关器(accumulator、epoch counter、time base、gps baseband)

基于FPGA的电子密码锁设计-已在开发板上成功运行，通过老师检验。(FPGA based electronic password lock design- has been successfully developed on the development board, through the teacher inspection.)