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cpsk_dpsk
数字通信系统相移键控CPSK信号和差分相移键控的调制与解调的VHDL代码(Phase shift keying digital communication system CPSK signals and differential phase-shift keying modulation and demodulation of the VHDL code for)
- 2009-11-06 16:11:03下载
- 积分:1
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shuzifujieqi
主要给出准循环的LDPC码编码实现方法,译码方法选择,并给出了帧同步的解决方法(Give the main quasi-cyclic LDPC codes achieve coding method, decoding method of selection, and give the frame synchronization solution)
- 2009-03-14 17:22:33下载
- 积分:1
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pluse
说明: 发送两个频段的脉冲 个数和频率均可调
发送两个频段的脉冲 个数和频率均可调(pluse and adjust the width of pluse pluse and adjust the width of pluse )
- 2010-04-14 11:00:03下载
- 积分:1
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ac97 VHDL core
ac97 VHDL core
- 2022-04-09 09:46:28下载
- 积分:1
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高阶矩阵奇异值分解的FPGA实现方法svd_fpga
一种计算高阶矩阵奇异值分解的FPGA实现方法。(A high-end computing matrix singular value decomposition of the FPGA realization method.)
- 2020-07-07 12:28:57下载
- 积分:1
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Detailed description of the FPGA design flow of the entire FPGA design flow full...
详细的说明了FPGA设计的整个流程
FPGA设计全流程Modelsim>>Synplify.Pro>>ISE-Detailed description of the FPGA design flow of the entire FPGA design flow full Modelsim> > Synplify.Pro> > ISE
- 2022-11-01 22:10:02下载
- 积分:1
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用FPGA实现CRC算法,只用一个脉冲就能实现,比传统的移位算法大大节约时间...
用FPGA实现CRC算法,只用一个脉冲就能实现,比传统的移位算法大大节约时间-Using FPGA to achieve CRC algorithm, only one pulse will be able to realize, than the traditional algorithm greatly saving time shift
- 2022-07-14 15:39:31下载
- 积分:1
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82 VHDL, verilog test case, involving a variety of grammatical rules. which is...
包括VHDL、verilog在内的各种设计实例,是学习硬件描述语言的帮手。共有82个实验例子,涉及各种语法规则。-82 VHDL, verilog test case, involving a variety of grammatical rules. which is you learn the HDL language helper.
- 2023-06-06 10:15:04下载
- 积分:1
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自适应均衡器
自适应均衡器
- 2022-07-13 15:30:18下载
- 积分:1
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uart_tx
FPGA UART 发送端程序 verilog语言编写
9600波特率 实用(UART transmit side program verilog language 9600 baud)
- 2013-08-14 16:33:34下载
- 积分:1