vhdl source code for 8 bit datapath logic

SDR SDRAM 控制器的源代码 altera公司的(source code from altera)

四位拨妞开关作为输入，当输入值变化时将其转化成两位输出(The four DIP Niu switch as an input, when the input value changes, be converted into two output)

combinational circuits code in vhdl

说明：  基于FPGA的USB接口设计，实现了USB与FPGA的通信(USB interface to FPGA-based design, implementation of the USB communication with the FPGA)

这时一个数字钟的VHDL程序，有计时、校时、整点报时功能，很适合做EDA设计之用-When a digital clock in VHDL procedures, time, school hours, the whole point timekeeping function, it is suitable for use in EDA Design

说明：  秒表的实现，有暂停清零功能，Quartus II(Stopwatch realization, has the pause clear function)

ad9850函数发生器 MSP430单片机驱动程序 扫频 DDS(AD9850 DDS)

温度传感器实验，将温控芯片的温度信号通过fpga用数码管显示(temperature display)

说明：  asssembly ccode to turn on 7 segmen

Uedit中对Keil C51、A51、avr、x86汇编以及VHDL语言的突出显示格式文件-Uedit of Keil C51, A51, avr, x86 VHDL compilation of the highlights format