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counter
本例源代码文件由用户按照书中的操作步骤自己生成,“Example-2-1Project_Navigator_Demo源代码”目录下为源代码的参考文件。“Example-2-1Project_Navigator_Democounter”目录下为完整的工程,包括源代码文件、综合与实现的结果文件、ISE工程文件等,可以使用ISE工程管理器打开工程,供读者参考(In this case the source code files by the user in accordance with the steps the book itself is generated, "Example-2-1 Project_Navigator_Demo source" directory as the source code reference document. "Example-2-1 Project_Navigator_Demo counter" directory for a complete project, including source code files, integrated with the realization of the outcome document, ISE project file, etc. You can use ISE Project Manager, open the project for the reader is referred to)
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DDR(双速率)SDRAM控制器参考设计,xilinx提供
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jt2
基于FPGA的交通灯代码,VHDL语言书写。适合新手学习vhdl语言时使用(FPGA-based traffic light code, VHDL language writing. Suitable for novice learning vhdl language used when)
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全数字锁相环的verilog源代码
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计数器的 vhdl 代码
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ISE7.1,采用VIRTEX
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- 2022-03-28 19:34:46下载
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Synchronous Resets Asynchronous Resets I am so confused! How will I ever know wh...
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- 2022-03-02 03:52:16下载
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FSK调制通信系统的程序,比较实用,包括有限..
通信系统的FSK调制程序,比较实用,包括完整的工程-FSK modulation communication system procedures, more practical, including the complete works
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sobel-with-verilog-language
用verilog实现sobel边缘检测算法(sobel edge detection with verilog language)
- 2020-07-12 19:38:53下载
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LDPC_Encoder
verilog 编写的ldpc编码,含有两个文件(LDPC written by Verilog)
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