VGA图象显示控制器设计,实现在VGA显示器上显示图象.

I2C IP for Quartus V9.0 sp2, can used in SOPC builder.

乘法器的vhdl语言描述.本人调试已经通过-Multiplier described in VHDL language. I have been through the debugging

带同步复位信号的二分频VHDL 程序-synchronous reset signal with the two-frequency VHDL procedures

用VERILOG实现 交通灯控制，且运行正确，希望有帮助(Use VERILOG implementation traffic light control, and operation right, hope to have help)

说明：  基于IIC协议的EEPROM模型，可实现串行数据转并行数据，并行数据转串行数据，分为EEPROM模块，EEPROM_WR模块，signal模块，Top模块(The EEPROM model based on IIC protocol can convert serial data to parallel data and parallel data to serial data. It is divided into EEPROM module and EEPROM module_ WR module, signal module, top module)

设计一个8位有符号数字平方器。平方器将接收操作数B，一个8位有符号数。新兴市场；

基于FPGA器件的DDS设计实现中的一个核心部分就是波形存储表的设计。首先采用LPM_ROM和 VHDL选择语句这两种方法进行波形存储表的设计和比较分析 然后考虑到硬件资源的有限性及DDS的精度要 求,对这两种方法的程序进行了优化 最后对这两种方法设计的程序进行仿真和硬件调试。结果表明:采用这两种 方法都能有效地实现DDS中波形存储表的设计。 (DDS-based FPGA devices designed to achieve one of the core of the waveform is stored in table design. First of all, choose to adopt LPM_ROM and VHDL statements of these two methods for the design waveform storage tables and comparative analysis and then, taking into account the limited hardware resources and the accuracy of DDS, the two methods to optimize the process the last of these two methods of process design simulation and hardware debugging. The results showed that: the use of these two methods are all effective ways to achieve the DDS waveform stored in the table design.)

QFSK的调制与解调，用C写的主程序，汇编写的调制与解调的子程序(QFSK the modulation and demodulation, with the main program in C, compile writing, the modulation and demodulation of the Subprogram)

该程序描述了运用FPGA 实现DDA圆弧插补运算(FPGA DDA)

HARIS角点检测Harris角点检测HARRIS CORENR探测器