VHDL语言写的频率计的程序，内带完整的技术报告

An FSM using VHDL and Johnson state encoding for states

LVDS De-serialization

说明：  4位加法器，4位数字相加及进位功能的实现，主要利用Verilog语言实现，简单轻松，且代码量少(a adder which can realize 4 bit numbers adding)

USB转RS232RSTTLRS485FT232+SP213串口的原理图AD画的(USB to RS232RSTTLRS485FT232+SP213 serial port schematic AD drawing)

This is the update firmware for CVFX-C02, 7" motorized touch screen car dvd player gps

基于单片机显示原理的IO和LED显示原理(Based on the principle of IO chip and LED display shows the principle)

基于VHDL的多路抢答器，用LCD12864进行显示(Multiplex answering device based on VHDL is displayed with LCD12864)

关于USB开发的verilog开发程序，非常的全面，学习FPGA开发时用得着。(About USB development verilog development process, very comprehensive, learning FPGA development time worthwhile.)

Altera QUARTUS 7.2的矩阵键盘电子琴完整工程（含源码），在EP2C20芯片上实现-Altera QUARTUS 7.2 Project of matrix keyboard electronic organ, implement on EP2C20 chip.

this Code is in verilog HDL. This Code is for piplined processor with 4 opcode. this will work in three cycle latch, decode and exicute.. test bench for xilinx ise is laos given