存储示波器，功能齐全通过验证，毕业设计用

本代码实现了 ； ；CORDIC  ； 算法语言；

Altera FIFO的多极级联，实现多个FIFO之间的数据传输。-Altera FIFO multi-polar cascading between multiple FIFO data transmission.

程序主要用硬件描述语言（VHDL）实现： 单片机与FPGA接口通信的问题-procedures major hardware description language (VHDL) to achieve : MCU and FPGA interface communication problems

说明：  用VHDL语言仿真乘法器设计, 经过modelsim仿真， synplify综合，并下载进FPGA验证(Multiplier design using VHDL, simulation, after modelsim simulation, synplify synthesis, and downloaded into a FPGA verification)

学习ISE的好资料，想要使用XILINX芯片进行开发必看(ISE learning good information, want to use a must-see XILINX chip development)

三种方法编写多路选择器的VHDL源代码 分别使用if else ,select ,when 语句-three methods to prepare multiple choice of VHDL source code were used if else, select, when words

基于赛林思FPGA芯片， 控制采集芯片AD9226的程序(FPGA control AD9226 program)

system gen & accel dsp 培训资料-system gen & accel dsp

使用FPGA来控制DDS信号的产生，从而达到高频信号产生的目的。使用的DDS芯片为AD9852，在QuartusII下编写。(Using the FPGA to control the DDS signal generation, so as to achieve high-frequency signal generation purposes. Use of DDS chip AD9852, in the QuartusII prepared.)

一个走马灯的程序,可以按照要求一个一个往后面按顺序点亮(A program for the lantern can be lit one by one according to the requirements.)