Verilog liushuideng shanshuodeng乘虚

LTE上行链路使用的DFT-S-OFDM系统的仿真，其中包括QPSK星座映射、串并转换、N点DFT、子载波映射等。(LTE uplink using the DFT-S-OFDM system simulation, including QPSK constellation mapping, string and conversion, N-point DFT, subcarrier mapping, etc..)

quartus一个完整的设计例子,从安装到实例完成，仿真等全过程，适合从0开始的初学者-Quartus a complete design examples, examples from installation to completion, the entire process of simulation, etc., suitable for the beginner to start from 0

很好的NAND Flash 硬件驱动语言，支持VHDL和verilog 语言方便移植，如果有想用FPGA直接驱动NAND flash而又不知如何下手的朋友肯定喜欢。(NAND Flash Controller Reference This reference design is used to interface a NAND Flash device and provides a simple host end interface. The host end interface of this design is user-configurable. It provides buffer select signal, buffer write enable signal, address bus, data bus, error status signal, control and handshake signals for the user......)

控制8个发光二极管中的一个发光二极管发光，其它7个发光二极管都出于截止状态，发光二极管的导通顺序按照向左或向右两个方向移动，并且通过按键控制发光二极管循环发光移动的方向。(Control of a light-emitting diode light-emitting eight light-emitting diodes, the other seven light-emitting diodes for the cut-off state, light-emitting diode conduction order in accordance with the left or right move in both directions, and light-emitting diode cycle luminous button control mobile direction.)

图像滤波中的中值滤波，有效滤除椒盐噪声，使用verilog语言编写(Image filtering in the median filter, effectively filter out salt and pepper noise, using verilog language)

UART RS232 IPCORE for sopc builder -RS232 UART IPCORE for sopc builder

4 bit ROM for Quartus

---- ---- ---- WISHBONE Wishbone_BFM IP Core ---- ---- ---- ---- This file is part of the Wishbone_BFM project ---- ---- http://www.opencores.org/cores/Wishbone_BFM/ ---- ---- ---- ---- Description ---- ---- Implementation of Wishbone_BFM IP core according to ---- ---- Wishbone_BFM IP core specification document.--------- ---- WISHBONE Wishbone_BFM IP Core---- -------- ---- This file is part of the Wishbone_BFM project---- ---- http://www.opencores.org/cores/Wishbone_BFM/---- -------- ---- Description---- ---- Implementation of Wishbone_BFM IP core according to---- ---- Wishbone_BFM IP core specification document.

最完整最实用的8051的软核，用VHDL语言编写全部原代码，并有详细的注释介绍，对开发增强型多功能单片机或RSIC单片机内核和单片机SOC应用非常有参考价值-most complete most practical of the 8051 soft-core, with all the preparation VHDL source code, and the Notes for a detailed briefing on the development of an enhanced multi-purpose microcontroller core or RSIC microcontroller and microprocessor applications SOC very valuable reference