verilog code for counter four

用VHDL语言设计四位全加器，有低位进位和高位进位。-VHDL language with four full-adder design, there are low and the high binary binary.

矩阵键盘控制的FPGA，verilog语言实现，包括rtl，ucf,以及testbench的详尽代码(Exhaustive code matrix keyboard control FPGA, Verilog language, including the rtl, ucf, and testbench)

基于Verilog HDL的完整数字跑表工程，在试验机台上运行验证通过了的。 用8位7段数码管分别显示微妙，秒，分。 有开始，暂停，复位功能。 学习VerilogHDL的经典例子，添加了显示功能。-Complete Verilog HDL-based digital stopwatch works in the test machine is running verify pass the platform. With 8-bit 7-segment digital tube showed the delicate, seconds, minutes. Has started, pause, reset. Learning VerilogHDL classic example of adding a display.

使用VerilogHDL语言加上IP核产生PWM调制波，占空比和频率可调。(The PWM modulation wave, duty cycle and frequency can be adjusted by using VerilogHDL language and IP kernel..)

在FPGA中编写FPGA芯片与DSP28335进行通信的程序(FPGA chip and DSP28335 written in FPGA communication program)

this program does something im not sure what but all i want is to get into the damn site thank you

FSK/MSK/GFSK/GMSK DIGITAL DEMODULATOR VHDL SOURCE CODE OVERVIEW

万能频率器，可以修改其中的参数，可是实现任意的分频！很方便！-Universal frequency, you can modify one of the parameters, but any implementation of the sub-band! Very convenient!

dct and idct vhdl code

VHDL实例,有近百个实例,都是可以在quarturs 上进行仿真的,大部分都可以通过,对初学者是一非常不错的-VHDL example, there are nearly a hundred examples, can be carried out in quarturs simulation, most of them can pass, for beginners is a very good