Xilinx FPGA make 50 smaller

串uart的vhdl，verilog，lattic实现原码 里面有四个文件,分别UART 源码 (lattice version)uart 源码 (Verilog)uart 源码 (VHDL)uart16550.tar-uart series of vhdl and verilog. lattic achieve the original code, there are four documents, Source respectively UART (lattice version) uart source (Verilog) uart source (VHDL) uart16550.tar

说明：  PF6182是一款很好的DC-DC同步降压IC。输出电压可调整，电流达2A。非常好用(PF6182 is a good DC-DC synchronous buck IC. Adjustable output voltage and current up to 2A. Very easy to use)

彩灯控制器 vhdl语言开发 eda实验-Lantern controller vhdl language test eda

华为内部资料，华为FPGA全套资料，包括华为的专利设计(Internal information Huawei Huawei FPGA complete information, including Huawei' s patented design)

I2C总线在可编程逻辑器件上实现的VHDL源码-VHDL source codes for realizing I2C

本文分析了当前国内外出租车计费系统的基本组成和工作原理及主要的两种设计方式:基于单片机的设计方式和基于FPGA的设计方式；并对这两种实现方式的优点和缺点进行分析，比较后确定本系统的方案：基于FPGA的出租车计费系统的设计。(This paper analyzes the current taxi charging system at home and abroad, working principle and basic components of two major design approach: the design methods based on single chip FPGA-based design approach and the two implementations to analyze the strengths and weaknesses, After comparing the program to determine the system: FPGA-based taxi billing system.)

具有16个校验位的RS编码器，在FPGA上实现。(With 16 RS encoder, the parity bit in the FPGA.)

verilog coding for butterworth filter with cut off frequency with 500hz

三十个vhdl源码，对于刚开始学习vhdl的很有帮助，可以帮助理解数字电路-30 vhdl source for the beginning of the study vhdl helpful, and can help to understand digital circuit

SAP-1硬件描述语言（使用Verilog语言）