Xilinx FPGA make 50 smaller

verilg语言实现测频 及与stm32以fsmc通信方式进行通信(Verilg to achieve frequency measurement and communication with STM32 in FSMC communication mode)

基于可编程逻辑器件FPGA的独立式键盘设计，内部具有硬件去抖动电路。值得一看-FPGA-based programmable logic device stand-alone keyboard design, the internal hardware to jitter circuit. Worth a visit

说明：  第1例到第6例的源描述都是从第8例的程序包中 提取出来的,不能单独编译,这些例子的编译与 模拟请参考第8例.(Example No. 1 to the first six cases are the source described in Example 8 from the first package to extract it and can not be a separate compiler, which compiler and simulation examples please refer to the first eight cases.)

FPGA开发板上写的Verilog代码： 功能是从电脑端发送一个字节，然后把它接收回来。 -FPGA development board to write the Verilog code: function is from the client computer sends a byte, and then receive it back.

液晶的控制，有VHDL语言实现-lcd control

multiplexerwe 的 vhdl 程序可以写也像 thisits 非常简单的代码为 beginers 了解 4： 1 多路复用器

中值滤波实现。选择在Vivado软件上采用Verilog语言来编写中值滤波算法，搭建出完整的数据处理系统架构，通过仿真和验证来判断数据的处理效果，并在实际的设计过程中根据出现的问题提出解决方案。(Median filter implementation. The author chose Verilog language to write the median filter algorithm in Vivado software, built a complete data processing system architecture, judged the data processing effect through simulation and verification, and proposed a solution according to the problems in the actual design process.)

8051core-Verilog FPGA

说明：  通过循环读写DDR3内存，了解其工作原理和DDR3控制器的写法，由于DDR3控制复杂，控制器的编写难度高，这里笔者介绍XILINX的MIG控制器情况下应用，是后续音频、视频等需要用到SDRAM实验的基础。(Through reading and writing DDR3 memory circularly, we can understand its working principle and the writing method of DDR3 controller. Because of the complexity of DDR3 control, it is difficult to write the controller. Here, the author introduces the application of Xilinx's MIG controller, which is the basis of SDRAM experiment for subsequent audio and video.)

USB接口控制器参考设计VHDL代码,方便开发FPGA人员进行USB的开发，是一个不错的源码。-USB interface controller reference design VHDL code, facilitate the development of FPGA personnel USB development, is a good source.