vhdl 语言代码多路复用器

SPI verilog RTL code

基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,基于视频的运动跟踪(System Generator based image processing engineering, multimedia processing on FPGA source, video-based motion tracking)

NIOS II IDE 编程， LCD测试程序，仅供参考。-NIOS II programming IDE, LCD testing procedures, for information purposes only.

一个基于FPGA的串口程序,已经经过验证,对用FPGA做串口的朋友提供参考和借鉴!-an FPGA-based serial procedures have proven, right Serial do with FPGA reference for a friend and borrow!

一种接口控制板的逻辑电路设计CPLD程序。-an interface to the control board CPLD logic circuit design process.

基于VHDL的抢答器程序,包含完整的源代码,锁脚文件以及下载文件,可直接下载使用-Answer Based on the VHDL program, including complete source code, locking pin, as well as download files documents can be directly downloaded using

Design approach for VHDL and FPGA Implementation of Automotive Black Box using CAN Protocol

使用Ｖeriolog hdl 编写手机屏测试程序．-Veriolog hdl prepared to use cell phone screen test.

压缩包是ti xds100v3 Design kit的安装文件，安装后有原理图、PCB文件，与DSP接口采用FPGA，安装后有源码，是VHDL格式的，支持开源，降低开发成本(Compression package is ti xds100v3 Design kit installation file after installation schematics, PCB files, and DSP interface with FPGA, after installation source is VHDL formats, support for open source, reduce development costs)

这是一个HDB3的译码器，实现从HDB3双极性码到高低电平二值序列的转化-This is a decoder of the HDB3, HDB3 bipolar from high-low-level code to the conversion of binary sequences