fft快速傅立叶变换源码

国外经典verilog代码，很适合初学者，其中的有些概念对老手也可以考虑下-Foreign classic Verilog code, it is suitable for beginners, of which some of the concept of a veteran may also want to consider under the

EDA用maxplus2开发设计的简易数字钟，适合初学者，vhdL语言(EDA maxplus2 in development and design of simple digital clock, is suitable for beginners, vhdL language )

wiley2007年的新书高级FPGA设计作者是权威的设计咨询公司老总，经验之谈-wiley2007-year senior FPGA design book author is the authority of the design consulting firm CEOs, experiences

simple code based on verilog shifter , cla ,clg , ALU ,PC, decoder , tb_top

这是一些小代码的集合 希望能对大家有所帮助(This is a collection of some small code for all of us hope to be helpful)

四位十进制频率计的顶层控制模块，用于生成测频需要的复位及控制信号-four decimal frequency of top-level control modules, used to generate the required frequency measurement and control signals reset

根据ASMD图设计验证冒泡排序算法。给出设计程序及时序仿真结果，含纸质报告。(According to the ASMD diagram design, verify the bubble sorting algorithm. Give the design procedure and the simulation result in time, including paper report.)

verilog program for 8-bit multiplier

基于FPGA的16QAM调制程序,基于verilog开发环境(16QAM modulation program based on FPGA-based development environment verilog)

pci协议主模块开发实用代码， 适合初级学习者使用 很不错(pci agreement to develop practical code, very good for junior learners)