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存储器DDR3在Xlinix平台上的设计教程和综合应用(Design course and comprehensive application of memory DDR3 on Xlinix platform)

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cache，实现了部分简单指令，仿真模拟确认可行(Single-cycle CPU, to achieve some simple instruction, simulation confirm feasible)

采用quartus的数模转换模块，RTL电路图(DAC module, RTL circuit diagram)

Iphong高级编程，讲解很独到很详细，推荐看一看！(Iphong advanced programming, to explain in great detail is very unique, recommend a look!)

VLSI Implementation IEEE Papers 2010 to 2014

FPGA Verilog控制FLASH片外读写(Verilog Controls FLASH Out-of-Chip Read-Write)

说明：  适应多个模式的rs编码，Verilog，选择对应的多项式(RS coding adapted to multiple modes.)

说明：  OFDM基带处理的书籍和论文，以及发送和接收端源码。(OFDM baseband processing books and papers, as well as send and receive source code.)

说明：  实现UDP的网络传输，在PC建立UDP的服务器，向fpga的ip：192.168.0.25发送数据，实现回环通讯。(The network transmission of UDP is realized. UDP server is set up in PC, and the data is sent to IP: 192.168.0.25 of FPGA to realize loop communication.)