-
CH4CH2CH1VHDL 数字电路参考书所有程序7
CH4CH2CH1VHDL 数字电路参考书所有程序7-CH4CH2CH1VHDL digital circuit reference all proceedings 7
- 2022-07-28 00:29:41下载
- 积分:1
-
Three
Three-input Majority Voter
-- The entity declaration is followed by three alternative architectures which achieve the same functionality in different ways.
-Three-input Majority Voter -- The entity declaration is followed by three alternative architectures which achieve the same functionality in different ways.
- 2022-08-12 06:51:37下载
- 积分:1
-
fir
该程序实现了一个FIR滤波加速器,该程序在FPGA板上开发,通过使用VHDL语言来定义RS232端口的使用(design a FIR Filter Accelerator based on FPGA board and RS232 interface using VHDL language. )
- 2013-06-07 06:27:32下载
- 积分:1
-
FIR
FIR滤波器的VHDL源代码及测试文件,已通过编译仿真,绝对正确。(FIR filter VHDL source code and test files, has passed the compiled simulation, absolutely correct.)
- 2021-04-15 11:08:54下载
- 积分:1
-
一个在Xilinx spartan3实现的时钟,具有时分秒的计时显示以及年月日的显示,很有参考价值
一个在Xilinx spartan3实现的时钟,具有时分秒的计时显示以及年月日的显示,很有参考价值-A Xilinx spartan3 realize the clock, with time-accurate time display and date display, a good reference
- 2022-08-12 21:17:53下载
- 积分:1
-
004
51单片机的下载器PCB图,可以用于at89cXX和at89c0xx系列的单片机的程序烧录,简单好用!使用proteus画的板。(51 MCU PCB map downloader, can be used at89cXX and procedures for microcontroller series at89c0xx burning, easy to use! Drawing board with proteus.)
- 2011-10-26 11:03:40下载
- 积分:1
-
采用Verilog HDL硬件语言设计,实现基本的公用电话计费功能,设计完整....
采用Verilog HDL硬件语言设计,实现基本的公用电话计费功能,设计完整.-Using Verilog HDL language hardware design, the realization of the basic public telephone billing function, design integrity.
- 2022-02-25 23:14:29下载
- 积分:1
-
tdm_latest[1]
TDM,就是时分复用。本程序完成4通道,没通道最多32路64K信号的交换,就是说可以完成32x4个电话信号交换(TDM, is time-division multiplexing. The process is complete 4-channel, no channel up to 64K 32 to exchange signals, that can be done 32x4 telephone signal exchange)
- 2010-07-07 15:28:06下载
- 积分:1
-
Verilog entry basis, as well as introduce a simple programming, verilog in recen...
verilog入门基础以及简单编程介绍,verilog是近几年发展迅速的一门硬件语言-Verilog entry basis, as well as introduce a simple programming, verilog in recent years the rapid development of a hardware language
- 2023-01-25 17:05:04下载
- 积分:1
-
EDA-Cont-LED-201006
FPGA-CPLD实习计数器7段数码管控制接口设计与LED显示控制,FPGA译码(FPGA-CPLD internship counter 7-segment LED control interface design and LED display control, FPGA decoder)
- 2013-05-11 23:09:25下载
- 积分:1