hard work for Dictyophora development. . We hope that the right useful.

基于VHDL语言开发的I486总线接口程序。实现了一个三态的总线，可保证数据的正常传输。-based on VHDL development of the I486 bus interface procedures. Implementation of a three-state bus can ensure that the normal data transmission.

Use full for knowing board details while making projects on FPGA and matlab simulations

SPI经典ip核 可以直接用于工程的开发和利用-err

波形发生器，带TESTBENCH， 多平台 -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn -waveform generator, with TESTBENCH. Multi-platform-- the design makes use of the new shift opera tors available in the VHDL-93 std-- this design passes the Synplify synthesis check-- downloa d from : www.fpga.com.cn

（1）能够测试10HZ~10MHZ的方波信号； （2）电路输入的基准时钟为1HZ，要求测量值以8421BCD码形式输出； （3）系统有复位键； （4）采用分层次分模块的方法，用Verilog HDL进行设计，并对各个模块写出测试代码； （5）具体参照说明文档（包含源代码，仿真图，测试波形，详细的设计说明）(A square wave signal capable of testing 10HZ~10MHZ; (2) the reference clock input by the circuit is 1HZ, and the measured value is output in the form of 8421BCD code; (3) the system has a reset key; (4) adopt the method of layering sub sub module and design with Verilog HDL; (5) write test simulation program.)

此为华远显示320*240LCD驱动程序，该程序也适用于带RA8806控制器的LCD(This is the Huayuan display 320* 240LCD driver, the program also applies with RA8806 LCD controller)

Cadence_manual_1.2.pdf

8路视频光端机 接收侧 VHDL源码，使用了千兆以太网SERDES芯片，基于TBI接口的PCM视频传输。-8-Channel Video Optical Receiver side of VHDL source code, using the Gigabit Ethernet SERDES chip, based on the TBI interface PCM video transmission.

交通灯控制（VHDL）-Traffic Light Control (VHDL)! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! !